Computer Systems and Networks

Software requirement:

You must use the Logisim simulator to create your circuits. Assignments

submitted using other programs will NOT BE ABLE TO BE MARKED due to

incompatible file formats.

 

Submission instructions:

You will be required to submit two files electronically using learning @ griffith.

The two files will be a digital logic simulator circuit (created using the Logisim

simulator) and a written report (PDF format only) as described in the text

below.

 

You are to submit these files electronically to the learning @ griffith site for

this course. Full instructions including a link for submitting your assignment

will be made available in the same place where you downloaded this

assignment.

 

Important:

All your filenames must be prefixed with your student number, an underscore

character, first name, an underscore character, last name, underscore

character and then the name of the file. PLEASE DO NOT SUBMIT ZIP (or

other) ARCHIVES.

 

Eg.

 

Your Logisim file would be named:

 

s123456_FirstName_LastName_Logic_Circuit.circ

 

Your Written Report file would be named:

 

s123456_FirstName_LastName_Report.pdf

 

Files with filenames that do not adhere to this requirement may NOT be

marked or may attract a mark penalty.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

1007ICT / 7611ICT Computer Systems and Networks

 

Assignment – Semester 1, 2016

 

Individual Assignment

This is an individual assignment. All work submitted must be your own work.

As per the warning given in the first lecture, be careful not to use the work of

others as your own nor have others use your work as their own. The

assignment will be marked out of 100. Marks will be allocated according to the

following table:

 

Interview-note:

The in-person explanation of how the circuit works will be a short (about 5

minute) informal interview between you and your workshop demonstrator.

During this interview you will demonstrate your circuit and convey your

understanding of all aspects of the completed circuit. This interview will be

held in your workshop in Week 12 or Week 13 and will also serve as a way to

receive individual feedback on your work.

 

Task Description:

You are to build (and test) the following digital logic circuit in the Logisim

simulator and write a short report that describes your circuit. The maximum

mark that you are able to achieve on the assignment will be determined by the

difficulty of the circuit you decide to build (Option 1 or Option 2, see below).

 

Circuit Options:

 

 

Aspect Maximum mark

 

Circuit (70 marks)

Difficulty 35 or 60 (See task

 

Report (20 marks)

In-person interview to explain

how the circuit works

(10 marks)

 

(see interview-note below)

Circuit Difficulty rating (max

mark)

OPTION1: Part A only 35

OPTION2: Part A and Part B 60

Please note:

It may be better to have a fully functional and neatly drawn simple circuit than

a complex one that is messily constructed and/or does not function properly.

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description)

Use of templates 5

Neatness 5

Accuracy  10

Completeness 5

Neatness,

appropriate use

of language

and layout

 

 

Accuracy

Total 100

5

10

1007ICT / 7611ICT Computer Systems and Networks

 

Assignment – Semester 1, 2016

 

Labelling

You must label each circuit and template that you construct with the

Annotation tool and ensure that all the inputs are labelled as instructed in this

sheet. Each circuit and template must be labelled with:

 

 

1. Your name
2. Your student number
3. An appropriate label for each input
4. An appropriate label for each output
5. An appropriate label for the template that describes its function

Note:   Be careful, before submission, test if your circuit works as required.

 

Templates/Subcircuits

You will be required to use templates (Logisim calls these subcircuits) to

simplify the overall circuit design. Instructions for using templates/subcircuits

will be made available on learning @ Griffith.

 

Testing

You will need to test various possible combinations for the inputs K1, K2, K3,

L1, L2 and L3 and check if the desired output is obtained (for Part A). You do

not need to submit your tests.

 

For Part B, you will also have to test the cases where the lock is permanently

locked after the maximum number of incorrect attempts, and where a

successful unlocking will reset the count of incorrect attempts.

 

Report

Your report (6 – 8 pages) must contain the following sections:

 

1. Your details: Name, student number, and email address
2. Circuit Function: A brief (100-200 words) description of the function of

each part of your circuit describing in your own words how that part of

the circuit operates. This should be split up into sections that relate to

the different components (templates/subcircuits) in the overall circuit.

3. Circuit diagrams: A diagram of your circuit including all

templates/subcircuits and their contents. You must draw this diagram

yourself using the Logisim logic simulator. To include a circuit in your

report, please take a screen shot of the circuit and paste the

screenshot into your report. Copying and pasting from the lecture notes

or other sources is NOT permitted.

4. Truth table: Show all possible inputs and outputs for the key and lock

values showing for which combinations the lock is unlocked. The

column headings in your truth table should correspond to the labels on

your circuit diagram.  

7611ICT ONLY: An extra section discussing how you would modify the

circuit for a different purpose. Details for this requirement are on page 6.

 

In-person Interview

To be held in your workshop in week 12 or week 13. You will be asked to

clearly demonstrate your circuit and your understanding of its operation to

your workshop demonstrator.

3

 

1007ICT / 7611ICT Computer Systems and Networks

 

Assignment – Semester 1, 2016

 

Requirements:

For this assignment you are required to implement a simple key and lock

mechanism. The key will be an octal digit (3 input bits, values 0..7). The lock

will also be an octal digit (3 input bits, values 0..7). The key will fit the lock if its

octal digit matches the octal digit of the lock.

 

 

Example 1: Key is 2 and Lock is 7. The numbers (2 and 7) do not

match, the key does not unlock the lock.

 

Example 2: Key is 6 and lock is 3. The numbers (6 and 3) do not

match, the key does not unlock the lock.

 

Example 3: Key is 5 and lock is 5. The numbers (5 and 5) match, the

key unlocks the lock.

 

Note: These are just a couple of examples. There are more cases that result

in the key unlocking the lock or failing to unlock the lock. Your circuit must

correctly unlock or keep the lock locked for all cases.

For this assignment, the key will be represented by three inputs (3 bits). The

three key inputs are named as K1, K2, and K3. The table below shows the

assignment of bits to each key value for K1, K2, and K3.